61 lines
3.6 KiB
Markdown
61 lines
3.6 KiB
Markdown
# MAME 0.264 patches
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install.sh (component `mame`) applies these to the MAME 0.264
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release in filename order, then builds one binary with the apple2gs and x68k
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drivers. The gates depend on every one of them.
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| Patch | What it fixes | Needed by |
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| 0002-z80scc-rx-fifo | Makes the Z8530 receive FIFO depth selectable at run time (see below). By default it is 512 bytes, so a POLLED receiver (no RX interrupt) survives the emulator's deaf windows; `JOEY_Z80SCC_RX_FIFO=3` restores the real chip's depth. Originally written for RetroNet. | IIgs serial gates (512); `verify-iigs-serial-loss.sh` (3) |
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| 0003-x68k-crtc-timing | The X68000 CRTC: the graphic high-speed clear's timing (the main defect), and the text raster copy firing on both hsync edges instead of only the front porch | X68000 gates and timing |
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| 0004-x68k-waitstates-rs232-mouse | Three X68000 changes that edit the same files: VRAM wait states (MAME modelled none), the RS-232C port wired to a slot so `-rs232c null_modem` works, and a backport of upstream commit ab6b6fc9e797 (Patrick Mackinlay, "x68k: add serial mouse"), which provides the `:mouse_port:x68k:X/Y/BTN` inputs | `verify-x68000-serial.sh`, `verify-x68000-mouse.sh`, X68000 timing |
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There is no 0001 any more. It gave the IIgs SCC a 3.6864 MHz PCLK and no
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RTxC clock, to suit a HAL that ran the baud rate generator from PCLK. Stock
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MAME already clocks the chip as a IIgs does (PCLK 7.16 MHz from the Mega II,
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the 3.6864 MHz crystal on RTxC), and the HAL now runs the generator from
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RTxC, as cc65's IIgs driver does, and takes 115200 straight from the crystal.
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## Receive FIFO depth (0002)
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Real Z8530 silicon holds 3 received bytes (an ESCC, 8), so a real client
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needs interrupt-driven receive. Under emulation a polled receiver sees deaf
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windows no real machine has, so by default the patched MAME gives every
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Z8530 channel (IIgs and X68000 alike) a 512-byte receive FIFO. The
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environment variable `JOEY_Z80SCC_RX_FIFO` overrides that for one run:
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| `JOEY_Z80SCC_RX_FIFO` | Receive FIFO depth |
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|---|---|
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| unset or empty | 512 (the default the gates rely on) |
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| `3` | the real Z8530 (stock MAME's value); an ESCC keeps its real 8 |
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| `N` | N, clamped to 3..512; an ESCC never gets fewer than 8 |
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MAME's ring of size N holds N-1 unread bytes, so 3 overruns on the third
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unread byte, one byte earlier than silicon (whose 3-byte FIFO fills first):
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a slightly stricter test than the real chip. When the variable is set, MAME
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prints `<channel tag>: RX FIFO depth N (JOEY_Z80SCC_RX_FIFO)` for each
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channel at start-up, so a log shows the depth really was applied.
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`scripts/verify-iigs-serial-loss.sh` runs with 3, because a 512-byte FIFO
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would hide exactly the receive loss that gate looks for.
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## Why the X68000 changes are one patch
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They were first kept as three separate patches, but the upstream mouse
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backport no longer applied cleanly on top of the other two in any order, and
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the sources the working MAME was built from had been fixed up by hand. These
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four files were regenerated on 2026-09-27 by diffing that working tree
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against the pristine 0.264 release, so they reproduce it exactly (verified:
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every file applies with zero fuzz and matches byte for byte).
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## Probes
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`lua/` holds the MAME Lua probes used while developing the X68000 patches
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(boot check, CRTC timing, wait states). Run one with
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`mame x68000 -bios ipl10 -autoboot_script lua/<probe>.lua`.
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## License
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The patches modify MAME and contain its code, so they are under MAME's
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license, the GNU GPL v2 or later, not JoeyLib's MIT License. The files 0004
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adds from upstream MAME keep their own notices (BSD-3-Clause, Patrick
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Mackinlay). The Lua probes in `lua/` are JoeyLib's own (MIT).
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