Change default FIFO trigger from 8 to 1, yield CPU when idle

Default RX FIFO trigger level of 8 (FCR_TRIG_8) caused exactly 8
characters to buffer in hardware before the ISR fired. Change default
to 1 (FCR_TRIG_1) for responsive single-character interrupts while
keeping the 16-byte FIFO enabled as a safety buffer. COMnRxTRIGGER
SYSTEM.INI key still allows override.

The PM_NOYIELD polling loop never yielded the CPU timeslice, starving
other Windows applications. Add Yield call when no serial data is
flowing so other apps get CPU time. During bulk data flow HasData
stays true and the loop runs at full speed.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>

delphi/TESTMAIN.PAS

@@ -166,8 +166,9 @@ end;
 
 procedure TMainForm.Run;
 var
-  Msg: TMsg;
+  Msg:     TMsg;
-  S:   string;
+  S:       string;
+  HasData: Boolean;
 begin
   Show;
   FDone := False;
@@ -188,17 +189,28 @@ begin
     if FDone then
       Break;
 
-    { Poll serial data -- read one chunk, then yield to messages }
+    { Poll serial data -- read one chunk per iteration }
+    HasData := False;
     if FComm.PortOpen then
     begin
       S := FComm.Input;
       if Length(S) > 0 then
+      begin
         FAnsi.WriteDeferred(S);
+        HasData := True;
+      end;
     end;
 
     { Tick blink (dirties rows if interval elapsed), then render }
     FAnsi.TickBlink;
     FAnsi.FlipToScreen;
+
+    { Yield CPU to other apps when no serial data is flowing.          }
+    { PM_NOYIELD keeps message draining fast; Yield here gives other   }
+    { apps a timeslice only when idle.  During bulk data flow, HasData  }
+    { stays True and the loop runs at full speed.                      }
+    if not HasData then
+      Yield;
   end;
 end;
 

drv/commdrv.c

@@ -1043,21 +1043,21 @@ static void initPortState(PortStateT *port, int16_t commId)
         trigKey[11] = 'E';
         trigKey[12] = 'R';
         trigKey[13] = '\0';
-        rxTrigger = readSystemIni("386Enh", trigKey, 8);
+        rxTrigger = readSystemIni("386Enh", trigKey, 1);
     }
     switch (rxTrigger) {
-        case 1:
-            port->fifoTrigger = FCR_TRIG_1;
-            break;
         case 4:
             port->fifoTrigger = FCR_TRIG_4;
             break;
+        case 8:
+            port->fifoTrigger = FCR_TRIG_8;
+            break;
         case 14:
             port->fifoTrigger = FCR_TRIG_14;
             break;
-        case 8:
+        case 1:
         default:
-            port->fifoTrigger = FCR_TRIG_8;
+            port->fifoTrigger = FCR_TRIG_1;
             break;
     }