Merge branch 'main'

src/link816/link816.cpp

@@ -431,6 +431,7 @@ struct Imm24Site {
 static std::vector<Imm24Site> gImm24Sites;
 static uint32_t gTextBaseForSites = 0;
 static bool    gRecordSites = false;
+static unsigned long gBank0DataSites = 0;
 
 // --report-self-mod: audit diagnostic.  Reports every intra-.text-section
 // IMM16 reference made with a STORE opcode (absolute, DBR-relative) into the
@@ -805,17 +806,14 @@ static void applyTextReloc(std::vector<uint8_t> &buf, uint32_t off,
     // per-seg list for seg 1, since rodata is in seg 1's bank by
     // design).
     if (targetSeg == 0) {
-        // BANK-0 DATA/BSS target (inside SEG1's payload) referenced with a LONG form from an
+        // BANK-0 DATA/BSS target (inside SEG1's payload) referenced from an overflow segment: the
-        // overflow segment: the baked bank byte would be the LINK-TIME bank (0), but the Loader
+        // GS/OS Loader honors at most PAGE alignment (it ignores OMF ALIGN=$10000), so seg1 loads
-        // places seg1 in an arbitrary bank - every such read/write silently hits the wrong bank
+        // at an arbitrary in-bank offset and every baked data operand from another segment misses
-        // (measured live on the RetroNet IIgs client: cross-TU constant-index accesses compile to
+        // by that offset (measured live on the RetroNet IIgs client: functions packed into seg1
-        // LDA long and returned garbage while DBR-relative abs16 to the same symbols worked).
+        // worked, everything else read/wrote unowned memory - MAME memory-tap proven).  Emit
-        // Emit a 3-byte cINTERSEG against seg 1 so the Loader writes the true 24-bit address.
+        // cINTERSEG records against seg 1 so the Loader writes the true placed address: 3 bytes
-        // ...and the SAME hole exists for 16-bit forms: seg1 is only PAGE-aligned by the real
+        // for IMM24/DATA32, 2 for IMM16 (bank comes from DBR - BANKSIZE=$10000 keeps seg1 within
-        // GS/OS Loader (it does not honor ALIGN=$10000), so abs16 operands and bank-byte
+        // one bank), 2+shift16 for BANK16.
-        // materializations referencing seg1 data are wrong by seg1's placement offset unless the
-        // Loader patches them.  Emit 2-byte cINTERSEG records for those too; BANKSIZE=$10000
-        // guarantees seg1 never straddles a bank, so offset16+DBR stays coherent.
         if (gRecordSites && patchSeg >= 1 && !segments.empty() &&
             (rtype == R_W65816_IMM24 || rtype == R_W65816_DATA32 ||
              rtype == R_W65816_IMM16 || rtype == R_W65816_BANK16) &&
@@ -831,6 +829,7 @@ static void applyTextReloc(std::vector<uint8_t> &buf, uint32_t off,
             s.byteCnt   = cnt;
             s.bitShift  = (rtype == R_W65816_BANK16) ? 16 : 0;
             gInterImm24Sites.push_back(s);
+            gBank0DataSites++;
             return;
         }
         applyReloc(buf, off, patchAddr, target, rtype, symName);
@@ -2604,6 +2603,7 @@ int main(int argc, char **argv) {
         linker.writeMultiSegment(outPath, linker.manifestPath, "__start");
     }
 
+    std::fprintf(stderr, "link816: %lu bank0-data cINTERSEG sites\n", gBank0DataSites);
     std::fprintf(stderr,
         "linked: text=[0x%04x+%u] rodata=[0x%04x+%u] bss=[0x%04x+%u] "
         "-> %s (%zu bytes)",