License added.

LICENSE.TXT

@@ -0,0 +1,279 @@
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+SOFTWARE.
+

README.md

@@ -151,5 +151,17 @@ backend internals.
 
 ## License
 
-Apache 2.0 (matching the LLVM project's license). See
+The Apache License v2.0 with LLVM Exceptions, the license of llvm-mos and
-`tools/llvm-mos/LICENSE.TXT` after install.
+the LLVM project (`LICENSE.TXT`, llvm-mos's own, from the commit in
+`llvmMosCommit.txt`). It covers the runtime too: by the LLVM Exceptions, a
+program the runtime is compiled into may be shipped without meeting the
+license's notice conditions (sections 4(a), 4(b) and 4(d)).
+
+Third-party code in this repository keeps its own license:
+
+| Path | What | License |
+|---|---|---|
+| `runtime/include/c++/etl/` | The Embedded Template Library | MIT (its `LICENSE`) |
+| `tests/lua/lua-5.1.5/` | Lua 5.1.5 | MIT (its `COPYRIGHT`) |
+| `tests/coremark/coremark-src/` | CoreMark | Apache 2.0, plus EEMBC's acceptable use agreement for the CoreMark trademark (its `LICENSE.md`) |
+| `demos/frame.c`, `demos/minicad.c`, `demos/reversi.c` | Ports of Byte Works' 1989 ORCA/C samples (Mike Westerfield, Barbara Allred) | Byte Works' copyright; license Unknown |

STATUS.md

@@ -433,7 +433,9 @@ which runs correctly under MAME (apple2gs).
   when X dead); `StackSlotCleanup` (deletes redundant adjacent
   spills); `NegYIndY` (rewrites negative-Y indirect-Y stack-rel
   ops to avoid the 24-bit-add bank-cross).
-- Pre-emit: `BranchExpand` (long Bxx → INV_Bxx skip; BRA target);
+- Pre-emit: `BranchCleanup` (Bxx next ; BRA other → INV_Bxx other,
+  dead conditionals, branches to the next block; branch LENGTHS are
+  the assembler's relaxation: BRA → BRL, Bxx → INV_Bxx +3 ; BRL);
   `SepRepCleanup` (coalesces adjacent SEP/REP toggles, plus a
   cross-mode-neutral coalesce that drops REP/SEP pairs sandwiching
   X-flag-only ops, branches, transfers — saves 4B / 12cyc per
@@ -478,6 +480,66 @@ Work is now optimization-focused; the toolchain is feature-complete
 for the common-case C / minimal-C++ workload.  Priority is speed
 (cycle counts), not size.
 
+**Recently landed (2026-10-06, what round 5 left):**
+
+CoreMark 20583 -> 20449 ticks (-0.65%, CRCs validated); Space Taxi's
+synced attract segment 753 -> 757 presents (+0.5%; 753 re-measured on
+the old compiler, round 5 had 751); corpus .text 753388 -> 747351 bytes
+(-0.80%, 201 TUs, sources frozen for the A/B); UBER 51/51 hashes, no
+row slower (jlDrawCircle r=16 +7%, jlDrawPixel +1.4%, jlSamplePixel
++1.2%; jlStagePresent full read 849 -> 846 with the same 226 iterations
+in 16 frames, i.e. the millisecond window).  FileCheck 71/71, smoke
+217/217, Lua OK, every JoeyLib IIgs gate (golden, iigs-verify, visual,
+tilebank, input, audio, serial, save, loss, disk).
+
+- **Branch lengths are the assembler's.**  Branch fixups are now
+  PC-relative (`MCFixup` PCRel), so the assembler resolves a branch to
+  a label in its own section itself -- before, EVERY branch went to
+  link816 as an R_PCREL8/16 relocation, and BRA's relaxation compared
+  the target's offset in the section (not the displacement) with 127:
+  any BRA past a function's first 128 bytes became a BRL (46 of
+  joeyDraw.s's 59 source BRAs were BRLs).  W65816AsmBackend now
+  relaxes a BRA to BRL and a conditional Bxx to `INV_Bxx +3 ; BRL`
+  (BEQ_Long .. BVC_Long, isCodeGenOnly, 5 bytes) only when the final
+  displacement needs it, layout iterating to a fixed point.  The pre-
+  emit BranchExpand pass, which lengthened conditionals from size
+  estimates taken before StackRelToImg / FarPtrStageReuse still moved
+  code (90-byte margin), is now W65816BranchCleanup (its fall-through
+  inversion, dead-conditional and branch-to-next steps); in the old
+  output 2649 of 8250 BRLs and 1380 of 5621 `Bxx +3 ; BRL` pairs could
+  have been short.  Hand asm keeps every byte except the bogus BRLs
+  (now BRA) and PER/branches it resolved through link816 (now in the
+  assembler, same targets: checked branch by branch over JoeyLib's and
+  the runtime's .s).  An unresolved target (another section, a global
+  symbol) stays short; link816 range-checks it as before.  Test
+  branch-relax.ll (120-byte Bxx stays short, 130-byte relaxes, a late
+  BRA stays BRA; fails on the old compiler).
+- **promoteLoopLocal's address-taken test deleted.**  It looked for
+  ADDframe, which PEI has expanded by then, so it never fired -- and it
+  is unnecessary: a stack-relative access only names an i16 frame
+  index (spill slot, named stack argument, backend slot; addr_fi),
+  while an alloca, the va_list area and anything IR can point at is an
+  i32 frame index reached through [$E0],y, so no pointer reaches a
+  loop home.  Checked over the corpus: 243 loops take homes, 116 of
+  them in functions that take a stack address; all 1449 LEAs in those
+  functions land in an alloca or the va_list area, no home in either.
+  Matching the real shape (takesStackAddr) and forcing copy-outs would
+  have dropped 34 of the 243 promotions.  FarPtrStageReuse's ADDframe
+  checks were dead the same way and went too.  Test
+  loop-homes-addr-taken.ll.
+- **Y-indexed pointer loops: measured, rejected.**  A post-LSR IR pass
+  rewrote a loop's same-stride pointer walks onto one 16-bit offset
+  (`base + zext(off + K)`, peelPtr32Index's Y form) when SCEV bounded
+  the trip count: CoreMark 20449 -> 20416 (-0.16%), corpus +754
+  instructions.  The bases lose the DP pairs LSR's pointer PHIs got
+  (a loop-invariant argument is rematerialized from its stack slot and
+  staged into $E0/$E2 per access), and the offset lives in a DP word
+  (`lda off ; tay` per access, `lda off ; clc ; adc #K ; tay` per
+  constant offset), so unrolled bodies got worse.  It would pay with
+  the offset kept in Y across the loop (an Idx16 class + INY for the
+  step, no other Y use in the body) and loop-local homes for argument
+  pairs in call-free functions; versioning was not attempted.
+
 **Recently landed (2026-10-05, speed pass 2):**
 
 CoreMark 21800 -> 20583 ticks (-5.6%, CRCs match); Space Taxi's synced

runtime/build.sh

@@ -1,4 +1,8 @@
 #!/usr/bin/env bash
+# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+#
 # Build the entire W65816 runtime — assemble *.s, compile *.c.
 # Run after editing anything under runtime/src/.
 

runtime/include/assert.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
 #ifndef _ASSERT_H
 #define _ASSERT_H
 

runtime/include/c++/cmath

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // <cmath> — C++ shim over the W65816 runtime's <math.h>.
 //
 // llvm-mos clang++ on this target has no system C++ stdlib.  ETL's

runtime/include/c++/cstddef

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // <cstddef> — C++ shim over the W65816 runtime's <stddef.h>.
 //
 // Pulls in the runtime's <stddef.h> and re-exports size_t / ptrdiff_t

runtime/include/c++/cstdlib

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // <cstdlib> — C++ shim over the W65816 runtime's <stdlib.h>.
 //
 // Pulls in the existing extern-C-wrapped <stdlib.h> and re-exports the

runtime/include/c++/etl_profile.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // etl_profile.h — ETL configuration for the W65816 / Apple IIgs target.
 //
 // Picked up by etl/platform.h via __has_include("etl_profile.h").  This

runtime/include/c++/iigs/path.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // iigs/path.h - ProDOS / GS/OS aware path operations for C++ (Phase 5.4).
 //
 // ProDOS and GS/OS impose a small set of structural rules on pathnames

runtime/include/c++/sstream

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // <sstream> - cout-replacement wrapper for the W65816 / Apple IIgs target.
 //
 // std::stringstream / std::ostringstream are NOT provided on this target.

runtime/include/complex.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // C99 / C11 complex.h — complex-number types and core helpers.
 //
 // clang implements `_Complex` as a built-in type that lowers to a

runtime/include/ctype.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
 #ifndef _CTYPE_H
 #define _CTYPE_H
 

runtime/include/errno.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
 #ifndef _ERRNO_H
 #define _ERRNO_H
 

runtime/include/fcntl.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // fcntl.h -- file-control definitions for the GNO/ME runtime.
 //
 // O_* values match GNO's <sys/fcntl.h> exactly so binaries agree with the

runtime/include/fenv.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // fenv.h — floating-point environment.
 //
 // The W65816 softFloat / softDouble runtime is fixed at round-to-

runtime/include/fnmatch.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // fnmatch.h — POSIX glob-style pattern match.
 //
 // fnmatch(pattern, string, flags) returns 0 on a match, FNM_NOMATCH

runtime/include/glob.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // glob.h — POSIX pathname expansion.
 //
 // glob(pattern, flags, errfunc, &gb) iterates the directory portion

runtime/include/gno/kernel.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // AUTOGENERATED by scripts/genGnoKernel.py — DO NOT EDIT.
 // GNO kernel toolset $03 wrappers, callable from C.
 // Convention: each K* returns the kernel result (or -1 on error);

runtime/include/iigs/cursor.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // iigs/cursor.h - convenience wrappers for the QuickDraw Cursor Mgr.
 //
 // What's here today: a small push/pop stack of CursorRecord COPIES so

runtime/include/iigs/desktop.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // iigs/desktop.h - Full Window Manager desktop startup helper.
 //
 // Equivalent to ORCA-C's `startdesk` library function: brings up the

runtime/include/iigs/eventLoop.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // iigs/eventLoop.h - curated event loop for desktop apps.
 //
 // Wraps TaskMaster in a "register callbacks, call run, get out when

runtime/include/iigs/gsos.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // IIgs GS/OS file I/O wrappers.
 //
 // GS/OS calls dispatch through $E100A8 with X holding the call number

runtime/include/iigs/misc.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // iigs/misc.h - Misc Tool Set wrappers that genToolbox.py can't generate.
 //
 // genToolbox.py auto-generates inline-asm wrappers for every ORCA

runtime/include/iigs/resource.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // iigs/resource.h - typed-C facade over the IIgs Resource Manager.
 //
 // Phase 3.4 REAL implementation: parses .rsrc resource forks via the

runtime/include/iigs/sound.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // iigs/sound.h - convenience wrappers for the SoundManager toolset.
 //
 // What's here today: the simplest correct wrappers around the existing

runtime/include/iigs/sprite.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // iigs/sprite.h - 16x16 fixed-shape 4bpp packed sprite primitives for
 // SHR 320 mode.
 //

runtime/include/iigs/toolbox.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // AUTOGENERATED by scripts/genToolbox.py from NList.Data.
 // DO NOT EDIT by hand — regenerate to update.
 // Source: tools/nlist/NList.Data.txt (Dave Lyons' NiftyList database).

runtime/include/iigs/uiBuilder.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // iigs/uiBuilder.h - declarative UI scaffolding for desktop demos.
 //
 // Replaces hand-rolled ">> Menu \N3\r--Item\N250*Xx\r.\r" strings,

runtime/include/inttypes.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Minimal inttypes.h for the W65816 runtime.  Pulls in stdint.h's
 // fixed-width types and adds the printf/scanf format-string macros
 // for those types.  Standalone (does not include the host clang's

runtime/include/iso646.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // C95 iso646.h — alternative spellings of the C operators.  Mandated
 // by C11 for portability with sources written under older standards
 // or in code-pages without the punctuation symbols.

runtime/include/libgen.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // libgen.h — POSIX path-component helpers.
 //
 // dirname() returns the parent-dir portion of `path`; basename()

runtime/include/limits.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Minimal limits.h for the W65816 runtime.  Standalone (does not
 // include the host clang's limits.h, which pulls in glibc headers
 // and breaks the build).  Sizes per the W65816 backend's view:

runtime/include/locale.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Minimal locale.h for the W65816 runtime.  No real locale support —
 // just enough to let portable code compile.  setlocale() always
 // returns "C" and ignores its argument; localeconv() returns a

runtime/include/math.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
 #ifndef _MATH_H
 #define _MATH_H
 

runtime/include/setjmp.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // W65816 setjmp/longjmp — saves SP, return address (24-bit), and DP.
 // jmp_buf is 8 bytes of opaque storage.
 #ifndef _SETJMP_H

runtime/include/signal.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Minimal signal.h for the W65816 runtime.  No real signal handling
 // — IIgs has no concept of POSIX signals.  signal() always returns
 // SIG_ERR; raise() always returns -1.  These exist so portable code

runtime/include/stdalign.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // C11 stdalign.h — alias the keyword forms `_Alignas` / `_Alignof` to
 // the more readable lowercase names.
 

runtime/include/stdatomic.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // stdatomic.h — C11 atomic operations, single-core stubs.
 //
 // The W65816 is a uniprocessor with no preemption from a kernel scheduler

runtime/include/stddef.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Minimal stddef.h for the W65816 runtime.  Standalone (does not
 // include the host clang's stddef.h).
 

runtime/include/stdint.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Minimal stdint.h for the W65816 runtime.  Standalone (does not
 // include the host clang's stdint.h, which pulls in glibc headers
 // and breaks the build).  Sizes per the W65816 backend's view:

runtime/include/stdio.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
 #ifndef _STDIO_H
 #define _STDIO_H
 

runtime/include/stdlib.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
 #ifndef _STDLIB_H
 #define _STDLIB_H
 

runtime/include/stdnoreturn.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // C11 stdnoreturn.h — alias the keyword form `_Noreturn` to the more
 // readable lowercase name.
 

runtime/include/string.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
 #ifndef _STRING_H
 #define _STRING_H
 

runtime/include/sys/stat.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // sys/stat.h -- file status for the GNO/ME runtime.
 //
 // struct stat MUST byte-match the layout the GNO kernel's stat.c writes

runtime/include/sys/time.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // sys/time.h - POSIX gettimeofday() shim on the IIgs RTC.
 //
 // The IIgs Misc Tool ReadTimeHex (set $03, tool $0D) is the only

runtime/include/sys/times.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // sys/times.h -- process CPU-time accounting for the GNO/ME runtime.
 //
 // Layout byte-matches GNO's own <sys/times.h> (tools/gno kernel fills it):

runtime/include/sys/types.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // sys/types.h -- primitive POSIX id/size typedefs for the GNO/ME runtime.
 //
 // Single source of truth for the scalar types struct stat and the file

runtime/include/sys/wait.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // sys/wait.h -- GNO/ME process-wait status decoding.
 //
 // GNO's wait status is a single 16-bit int (sizeof(int)==2 on this target), the

runtime/include/tgmath.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // tgmath.h — type-generic math macros.
 //
 // Selects between the `f`-suffixed (float) and unsuffixed (double)

runtime/include/threads.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // threads.h — C11 threading API.  Single-core IIgs / bare-metal: every
 // thread function fails with `thrd_error`.  Mutexes / cond-vars compile
 // but produce no synchronization — callers running on a single core

runtime/include/time.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
 #ifndef _TIME_H
 #define _TIME_H
 

runtime/include/uchar.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // C11 uchar.h — char16_t / char32_t plus minimal conversion helpers.
 //
 // The W65816 runtime treats text as Latin-1 (8-bit) throughout, so

runtime/include/unistd.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // unistd.h -- POSIX process, credential, job-control + timing glue for the
 // GNO/ME runtime.  These wrap the GNO kernel toolset $03 primitives (see
 // gno/kernel.h) into POSIX names; the bodies live in runtime/src/libcGno.c.

runtime/include/wchar.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Minimal wchar.h for the W65816 runtime.
 //
 // wchar_t is 16-bit (matches `int` on this target).  No real

runtime/include/wctype.h

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // C95 / C11 wctype.h — wide-character classification + case folding.
 //
 // On the W65816 runtime wchar_t is 16-bit but text is Latin-1; the

runtime/src/crt0.s

@@ -1,3 +1,7 @@
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
 ; crt0 — C runtime startup for the W65816 backend.
 ;
 ; Entry point invoked by the loader (or the OMF dispatcher).  Sets up

runtime/src/crt0Gno.s

@@ -1,3 +1,7 @@
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
 ; crt0Gno.s — GNO/ME shell command crt0.
 ;
 ; Use this INSTEAD OF crt0.s / crt0Gsos.s when building an OMF intended

runtime/src/crt0Gsos.s

@@ -1,3 +1,7 @@
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
 ; crt0Gsos.s — GS/OS S16 application crt0.
 ;
 ; Use this INSTEAD OF crt0.s when building an OMF that the real

runtime/src/cursor.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // cursor.c - iigs/cursor.h implementation.  Push/pop stack of
 // CursorRecord COPIES so transient cursor swaps (busy, I-beam, etc.)
 // can be installed and restored without the caller juggling pointers

runtime/src/desktop.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // desktop.c - startdesk()/enddesk() — ORCA-C-style minimal desktop init.
 //
 // Brings up the toolset chain a full desktop app needs:

runtime/src/eventLoop.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // eventLoop.c - implementation of iigs/eventLoop.h.
 //
 // TaskMaster returns an event-code that already encodes "this was a

runtime/src/extras.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Tiny string.h / stdlib.h helpers — kept out of libc.c because
 // adding to that translation unit shifts vprintf's internal branch
 // distances and randomly breaks BranchExpand (same precedent as

runtime/src/gnoGsos.s

@@ -1,3 +1,7 @@
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
 ; gnoGsos.s — GS/OS calls from inside a GNO/ME process.
 ;
 ; GNO patches GS/OS entry $E100A8 to its interceptor (OurGSOS in

runtime/src/gnoKernel.s

@@ -1,3 +1,7 @@
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
 ; AUTOGENERATED by scripts/genGnoKernel.py — DO NOT EDIT by hand.
 ;
 ; GNO/ME kernel toolset $03 wrappers.

runtime/src/iigsGsos.s

@@ -1,3 +1,7 @@
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
 ; iigsGsos.s — INLINE-form GS/OS class-1 wrappers for bare-metal apps.
 ;
 ; Real GS/OS 6.0.2 / 6.0.4 at $E100A8 expects the INLINE form:

runtime/src/iigsGsosStub.s

@@ -1,3 +1,7 @@
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
 ; Minimal GS/OS dispatcher stub at $E100A8.  Native, M=0, X=0.
 ;
 ; Real GS/OS uses INLINE-form dispatch at $E100A8: the JSL is

runtime/src/iigsToolbox.s

@@ -1,3 +1,7 @@
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
 ; AUTOGENERATED by scripts/genToolbox.py from NList.Data.
 ; DO NOT EDIT by hand — regenerate to update.
 ; Source: tools/nlist/NList.Data.txt (Dave Lyons' NiftyList database).

runtime/src/iigsToolboxExtra.s

@@ -1,3 +1,7 @@
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
 ; iigsToolboxExtra.s — hand-written toolbox wrappers that don't fit the
 ; standard genToolbox.py shape and therefore aren't auto-generated.
 ; Anything in this file is preserved across regenerations of

runtime/src/libc.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Minimal libc for the W65816 backend.  Provides:
 //   string.h: memcmp, strlen, strcpy, strcmp, strncpy, strncmp, strchr,
 //             strrchr (memcpy, memmove and memset are in libgcc.s)

runtime/src/libcGno.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // libcGno.c — GNO/ME backend for our libc.
 //
 // Two roles:

runtime/src/libcxxabi.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Minimal libcxxabi shim for the W65816 backend.
 //
 // Provides just enough of the Itanium C++ ABI to make `dynamic_cast`

runtime/src/libcxxabiSjlj.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // SJLJ exception runtime for the W65816 backend.
 //
 // Works with the IR generated by clang's `-fsjlj-exceptions` lowering

runtime/src/libgcc.s

@@ -1,3 +1,7 @@
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
 ; Minimal libgcc-equivalent runtime for the W65816 / Apple IIgs.
 ; Provides the helpers that the LLVM backend lowers integer multiply,
 ; shift, divide, and modulo operations to.  Implementations are

runtime/src/libunwindStub.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // libunwindStub.c — Itanium _Unwind_* surface mapped onto our SJLJ runtime.
 //
 // Phase 5.1 of GAP_CLOSURE_PLAN (Phase 0.1 LOCKED option A): NOT a real

runtime/src/math.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Minimal math.h subset for the W65816 runtime.
 //
 // All operations work directly on the IEEE-754 bit representation

runtime/src/qsort.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // qsort + bsearch — own translation unit so the indirect cmp call
 // and the byte-swap inner loop don't perturb other libc code.
 //

runtime/src/resource.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // resource.c - Apple IIgs Resource Manager - real implementation.
 //
 // Replaces the Phase 3.4 stub.  Reads .rsrc resource forks via the

runtime/src/snprintf.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Buffer-formatting siblings of printf — kept in their own translation
 // unit so the shared writeXxx helpers don't have to take a function-
 // pointer sink (indirect call cost on this target) and so adding the

runtime/src/softDouble.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Real double-precision IEEE 754 soft-float for the W65816.  Treats
 // a `double` as `unsigned long long` (64-bit) and operates on its
 // bit pattern.  Returns by-value at the i64 ABI A:X:Y:DP[$F0].

runtime/src/softFloat.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // 32-bit IEEE 754 soft-float runtime for the W65816 backend.
 //
 // Implements the libcalls clang emits for float ops:

runtime/src/sound.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // sound.c - implementation of iigs/sound.h.  Thin wrappers around
 // the SoundManager toolset.  See header for what's intentionally not
 // here.

runtime/src/sprite.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // sprite.c - 16x16 fixed-shape 4bpp packed sprite engine for SHR 320
 // mode.  See runtime/include/iigs/sprite.h for the API contract and
 // the $C035-shadow-gotcha discussion.

runtime/src/sscanf.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // sscanf / fscanf — minimal scanf family for the W65816 runtime.
 // Format directives:
 //   %d / %i  signed int (decimal)

runtime/src/strtok.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // strtok / strtok_r — own TU so the noinline on strtok_r doesn't
 // affect other functions' inlining decisions.  Kept separate from
 // extras.c by historical convention.

runtime/src/strtol.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // strtol / strtoul — kept in their own translation unit because adding
 // them to libc.c bumped the libc.s layout enough that vprintf's branch
 // distances exceeded our BranchExpand threshold (caught by printf("%d

runtime/src/timeExt.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // time.h additions (struct tm, gmtime, localtime, mktime, asctime,
 // ctime, difftime, strftime). Split out from libc.c to keep that
 // translation unit's frame size below the W65816 stack-relative range.

runtime/src/ubsan.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // W65816 minimal UBSan runtime — handler stubs for
 // `-fsanitize=undefined -fsanitize-minimal-runtime`.
 //

runtime/src/uiBuilder.c

@@ -1,3 +1,7 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // uiBuilder.c - declarative UI scaffolding implementation.
 //
 // Menu mini-format reference (Apple IIgs TBR Vol.2 ch.13.MenuMgr,

scripts/genGnoKernel.py

@@ -28,6 +28,14 @@ from pathlib import Path
 OUT_ASM = Path("/home/scott/claude/llvm816/runtime/src/gnoKernel.s")
 OUT_HEADER = Path("/home/scott/claude/llvm816/runtime/include/gno/kernel.h")
 
+# The license header every generated file opens with (llvm-mos's license;
+# LICENSE.TXT), without its comment marker.
+LICENSE_LINES = [
+    "Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.",
+    "See https://llvm.org/LICENSE.txt for license information.",
+    "SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception",
+]
+
 # Each entry: (funcId, name, retSize, [argSize, ...])
 # Sizes in bytes (2 = i16, 4 = i32 / ptr32).  Names follow ORCA's K* prefix.
 #
@@ -178,7 +186,7 @@ def emitWrapper(funcId, name, retSize, argSizes):
 
 def emitHeader():
     """Generate a C header with extern decls for use by libc."""
-    hLines = [
+    hLines = ["// " + line for line in LICENSE_LINES] + ["//"] + [
         "// AUTOGENERATED by scripts/genGnoKernel.py — DO NOT EDIT.",
         "// GNO kernel toolset $03 wrappers, callable from C.",
         "// Convention: each K* returns the kernel result (or -1 on error);",
@@ -211,7 +219,7 @@ def emitHeader():
 
 
 def main():
-    asmLines = [
+    asmLines = ["; " + line for line in LICENSE_LINES] + [";"] + [
         "; AUTOGENERATED by scripts/genGnoKernel.py — DO NOT EDIT by hand.",
         ";",
         "; GNO/ME kernel toolset $03 wrappers.",

scripts/genToolbox.py

@@ -31,6 +31,14 @@ NLIST_PATH = Path("/home/scott/claude/llvm816/tools/nlist/NList.Data.txt")
 OUT_HEADER = Path("/home/scott/claude/llvm816/runtime/include/iigs/toolbox.h")
 OUT_ASM = Path("/home/scott/claude/llvm816/runtime/src/iigsToolbox.s")
 
+# The license header every generated file opens with (llvm-mos's license;
+# LICENSE.TXT), without its comment marker.
+LICENSE_LINES = [
+    "Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.",
+    "See https://llvm.org/LICENSE.txt for license information.",
+    "SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception",
+]
+
 # Type table: (size in bytes, c-type)
 TYPE_MAP = {
     "void":       (0, "void"),
@@ -265,7 +273,7 @@ def sizeInfo(sz, isPtr=False):
 def emit(decls):
     """Generate C header and .s file from parsed decls."""
 
-    cLines = [
+    cLines = ["// " + line for line in LICENSE_LINES] + ["//"] + [
         "// AUTOGENERATED by scripts/genToolbox.py from NList.Data.",
         "// DO NOT EDIT by hand — regenerate to update.",
         "// Source: tools/nlist/NList.Data.txt (Dave Lyons' NiftyList database).",
@@ -294,7 +302,7 @@ def emit(decls):
         "",
     ]
 
-    sLines = [
+    sLines = ["; " + line for line in LICENSE_LINES] + [";"] + [
         "; AUTOGENERATED by scripts/genToolbox.py from NList.Data.",
         "; DO NOT EDIT by hand — regenerate to update.",
         "; Source: tools/nlist/NList.Data.txt (Dave Lyons' NiftyList database).",

scripts/runFileCheckTests.sh

@@ -23,6 +23,7 @@ TEST_DIR="$PROJECT_ROOT/src/llvm/test/CodeGen/W65816"
 LLC="$PROJECT_ROOT/tools/llvm-mos-build/bin/llc"
 FILECHECK="$PROJECT_ROOT/tools/llvm-mos-build/bin/FileCheck"
 NOT="$PROJECT_ROOT/tools/llvm-mos-build/bin/not"
+OBJDUMP="$PROJECT_ROOT/tools/llvm-mos-build/bin/llvm-objdump"
 
 [ -x "$LLC" ]       || { echo "missing $LLC" >&2; exit 2; }
 [ -x "$FILECHECK" ] || { echo "missing $FILECHECK; build with 'ninja FileCheck not'" >&2; exit 2; }
@@ -56,6 +57,7 @@ for f in "${files[@]}"; do
         cmd=${cmd//llc/$LLC}
         cmd=${cmd//FileCheck/$FILECHECK}
         cmd=${cmd//not /$NOT }
+        cmd=${cmd//llvm-objdump/$OBJDUMP}
         out=$(bash -c "$cmd" 2>&1) || {
             ok=0
             echo "FAIL $name"

src/link816/link816.cpp

@@ -1,5 +1,9 @@
 // link816 — minimal flat-binary linker for W65816 ELF .o files.
 //
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Reads one or more ELF32 object files (produced by llvm-mc / clang -c
 // with the W65816 backend), concatenates their .text* / .rodata* /
 // .data* sections at consecutive addresses starting from a given base,

src/link816/omfEmit.cpp

@@ -1,6 +1,10 @@
 // omfEmit — wrap a flat binary (or a multi-segment manifest from
 // link816) in an Apple IIgs OMF v2.1 container.
 //
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
 // Single-segment mode (legacy): one CODE segment with KIND=0,
 // no INTERSEG opcodes, ORG=0 (loader picks bank).  Header layout
 // per OMF 2.1 spec: 44-byte fixed header + 10-byte LOAD_NAME +

src/llvm/lib/Target/W65816/CMakeLists.txt

@@ -27,7 +27,7 @@ add_llvm_target(W65816CodeGen
   W65816StackSlotCleanup.cpp
   W65816SepRepCleanup.cpp
   W65816FarPtrStageReuse.cpp
-  W65816BranchExpand.cpp
+  W65816BranchCleanup.cpp
   W65816TiedDefSpill.cpp
   W65816ABridgeViaX.cpp
   W65816WidenAcc16.cpp

src/llvm/lib/Target/W65816/MCTargetDesc/W65816AsmBackend.cpp

@@ -7,9 +7,9 @@
 //===----------------------------------------------------------------------===//
 //
 // W65816 assembler backend.  Implements applyFixup for the
-// R_W65816_* relocation family, BRA -> BRL relaxation when the 8-bit
+// R_W65816_* relocation family, branch relaxation when the 8-bit signed
-// signed displacement won't fit, and writeNopData using 65816 NOP
+// displacement won't fit (BRA -> BRL, Bxx -> inverted Bxx over a BRL),
-// ($EA) bytes.
+// and writeNopData using 65816 NOP ($EA) bytes.
 //
 //===----------------------------------------------------------------------===//
 
@@ -41,6 +41,31 @@ using namespace llvm;
 
 namespace {
 
+// The long form of a conditional branch (W65816InstrInfo.td's
+// InstPCRelLongCond), 0 for any other opcode.
+unsigned longCondOpcode(unsigned Opcode) {
+  switch (Opcode) {
+  case W65816::BEQ:
+    return W65816::BEQ_Long;
+  case W65816::BNE:
+    return W65816::BNE_Long;
+  case W65816::BCS:
+    return W65816::BCS_Long;
+  case W65816::BCC:
+    return W65816::BCC_Long;
+  case W65816::BMI:
+    return W65816::BMI_Long;
+  case W65816::BPL:
+    return W65816::BPL_Long;
+  case W65816::BVS:
+    return W65816::BVS_Long;
+  case W65816::BVC:
+    return W65816::BVC_Long;
+  default:
+    return 0;
+  }
+}
+
 class W65816AsmBackend : public MCAsmBackend {
   uint8_t OSABI;
 
@@ -112,6 +137,13 @@ public:
       return;
     }
 
+    // A resolved branch displacement counts from the end of the
+    // instruction, which the operand ends: Value is measured from the
+    // operand's first byte.
+    if (Fixup.getKind() == W65816::fixup_8_pcrel ||
+        Fixup.getKind() == W65816::fixup_16_pcrel)
+      Value -= Width;
+
     // PCRel8 (Bxx / BRA) takes a signed 8-bit offset.  If the resolved
     // displacement won't fit, the encoded byte is meaningless — the
     // branch would land somewhere unintended.  Diagnose explicitly
@@ -171,45 +203,42 @@ public:
   }
 
   // ----------------------------------------------------------------
-  // Relaxation: BRA (signed-8 displacement) -> BRL (signed-16).  When
+  // Relaxation.  A branch starts short; when its target lies beyond an
-  // the assembler determines that a forward/backward BRA's target lies
+  // 8-bit displacement the assembler asks fixupNeedsRelaxation, then
-  // beyond +/-128 bytes, it asks us first via mayNeedRelaxation /
+  // relaxInstruction for the long form: BRA (0x80 dd) becomes BRL (0x82
-  // fixupNeedsRelaxation, then via relaxInstruction to materialise the
+  // dd dd), and a conditional Bxx, which has no long form on the 65816,
-  // longer form.  Both BRA (0x80 dd) and BRL (0x82 dd dd) have the
+  // becomes its inversion over a BRL (`inv +3 ; brl dd dd`, the _Long
-  // same operand semantics (PC-relative) so the rewrite is just an
+  // opcodes).  Layout iterates until every branch fits, so a branch is
-  // opcode swap with the fixup kind upgraded from fixup_8_pcrel to
+  // long only where it must be -- the code generator leaves every
-  // fixup_16_pcrel.
+  // distance to this.
   //
-  // We do NOT relax conditional Bxx instructions yet: the 65816 has
+  // A target the assembler cannot resolve (another section, a global
-  // no long conditional branch, so the standard trick is to invert
+  // symbol) stays short: link816 resolves its R_PCREL8 and stops on one
-  // and span: `BNE l: ... -> BEQ skip; BRL l; skip:`.  That requires
+  // out of range.
-  // emitting two instructions in place of one and shifting all
-  // subsequent fixup offsets, which the layered MCAsmBackend API
-  // doesn't support cleanly.  A higher-level codegen pass (or a
-  // pre-emit MIR pass) is the right place for that.  Until then,
-  // out-of-range conditional branches still error out via the
-  // applyFixup diagnostic above.
   bool mayNeedRelaxation(unsigned Opcode, ArrayRef<MCOperand> Operands,
                          const MCSubtargetInfo &STI) const override {
-    return Opcode == W65816::BRA;
+    return Opcode == W65816::BRA || longCondOpcode(Opcode) != 0;
   }
 
   bool fixupNeedsRelaxationAdvanced(const MCFragment &F, const MCFixup &Fixup,
                                     const MCValue &Target, uint64_t Value,
                                     bool Resolved) const override {
-    if (Fixup.getKind() != W65816::fixup_8_pcrel)
+    if (!Resolved || Fixup.getKind() != W65816::fixup_8_pcrel)
       return false;
-    int64_t Signed = static_cast<int64_t>(Value);
+    // Value counts from the displacement byte, the branch from the
+    // instruction's end one byte later (as applyFixup).
+    int64_t Signed = static_cast<int64_t>(Value) - 1;
     return Signed < kBranch8Min || Signed > kBranch8Max;
   }
 
   void relaxInstruction(MCInst &Inst,
                         const MCSubtargetInfo &STI) const override {
-    if (Inst.getOpcode() == W65816::BRA) {
+    // The operand (the target expression) stays; the encoder emits the
+    // long form's fixup_16_pcrel.
+    if (Inst.getOpcode() == W65816::BRA)
       Inst.setOpcode(W65816::BRL);
-      // Operand stays the same (the symbol/expression).  The encoder
+    else if (unsigned Long = longCondOpcode(Inst.getOpcode()))
-      // will pick the BRL encoding (3 bytes) and emit fixup_16_pcrel.
+      Inst.setOpcode(Long);
-    }
   }
 };
 

src/llvm/lib/Target/W65816/MCTargetDesc/W65816MCCodeEmitter.cpp

@@ -18,6 +18,10 @@
 // tracking the per-instruction byte offset so block-move and other
 // multi-operand instructions get correctly-positioned fixups.
 //
+// Branch displacements are PC-relative fixups, so the assembler resolves
+// a branch to a label in its own section itself, and its relaxation
+// (W65816AsmBackend) sees the real displacement.
+//
 //===----------------------------------------------------------------------===//
 
 #include "MCTargetDesc/W65816FixupKinds.h"
@@ -38,6 +42,10 @@
 
 namespace llvm {
 
+// Where a long conditional branch (`inv +3 ; brl dest`) keeps the BRL's
+// displacement: after the inverted branch and the BRL opcode.
+static constexpr unsigned kLongCondDispOffset = 3;
+
 class W65816MCCodeEmitter : public MCCodeEmitter {
   MCContext &Ctx;
   const MCInstrInfo &MCII;
@@ -84,13 +92,18 @@ class W65816MCCodeEmitter : public MCCodeEmitter {
   unsigned encodePCRel16(const MCInst &MI, unsigned OpIdx,
                          SmallVectorImpl<MCFixup> &Fixups,
                          const MCSubtargetInfo &STI) const;
+  unsigned encodePCRelLongCond(const MCInst &MI, unsigned OpIdx,
+                               SmallVectorImpl<MCFixup> &Fixups,
+                               const MCSubtargetInfo &STI) const;
 
   // Shared implementation for every encode* helper.  `width` is the number
   // of bytes of the operand as it appears in the instruction stream; it
   // both advances the per-instruction offset and selects the fixup kind.
+  // `pcRel` marks a branch displacement.
   unsigned encodeOperand(const MCInst &MI, unsigned OpIdx, unsigned width,
                          W65816::Fixups fixupKind,
-                         SmallVectorImpl<MCFixup> &Fixups) const;
+                         SmallVectorImpl<MCFixup> &Fixups,
+                         bool pcRel = false) const;
 
 public:
   W65816MCCodeEmitter(MCContext &Ctx, const MCInstrInfo &MCII)
@@ -136,7 +149,8 @@ W65816MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO,
 unsigned W65816MCCodeEmitter::encodeOperand(const MCInst &MI, unsigned OpIdx,
                                             unsigned width,
                                             W65816::Fixups fixupKind,
-                                            SmallVectorImpl<MCFixup> &Fixups) const {
+                                            SmallVectorImpl<MCFixup> &Fixups,
+                                            bool pcRel) const {
   const MCOperand &MO = MI.getOperand(OpIdx);
   unsigned offsetForThisOperand = OperandOffset;
   OperandOffset += width;
@@ -147,7 +161,7 @@ unsigned W65816MCCodeEmitter::encodeOperand(const MCInst &MI, unsigned OpIdx,
 
   assert(MO.isExpr() && "unexpected operand kind for encoded operand");
   Fixups.push_back(MCFixup::create(offsetForThisOperand, MO.getExpr(),
-                                   MCFixupKind(fixupKind)));
+                                   MCFixupKind(fixupKind), pcRel));
   return 0;
 }
 
@@ -190,13 +204,21 @@ unsigned W65816MCCodeEmitter::encodeAddr24(const MCInst &MI, unsigned OpIdx,
 unsigned W65816MCCodeEmitter::encodePCRel8(const MCInst &MI, unsigned OpIdx,
                                            SmallVectorImpl<MCFixup> &Fixups,
                                            const MCSubtargetInfo &STI) const {
-  return encodeOperand(MI, OpIdx, 1, W65816::fixup_8_pcrel, Fixups);
+  return encodeOperand(MI, OpIdx, 1, W65816::fixup_8_pcrel, Fixups, true);
 }
 
 unsigned W65816MCCodeEmitter::encodePCRel16(const MCInst &MI, unsigned OpIdx,
                                             SmallVectorImpl<MCFixup> &Fixups,
                                             const MCSubtargetInfo &STI) const {
-  return encodeOperand(MI, OpIdx, 2, W65816::fixup_16_pcrel, Fixups);
+  return encodeOperand(MI, OpIdx, 2, W65816::fixup_16_pcrel, Fixups, true);
+}
+
+unsigned
+W65816MCCodeEmitter::encodePCRelLongCond(const MCInst &MI, unsigned OpIdx,
+                                         SmallVectorImpl<MCFixup> &Fixups,
+                                         const MCSubtargetInfo &STI) const {
+  OperandOffset = kLongCondDispOffset;
+  return encodeOperand(MI, OpIdx, 2, W65816::fixup_16_pcrel, Fixups, true);
 }
 
 MCCodeEmitter *createW65816MCCodeEmitter(const MCInstrInfo &MCII,

src/llvm/lib/Target/W65816/W65816.h

@@ -72,12 +72,10 @@ FunctionPass *createW65816SepRepCleanup();
 // W65816FarPtrStageReuse.cpp.
 FunctionPass *createW65816FarPtrStageReuse();
 
-// Pre-emit pass: expands long conditional branches into the
+// Pre-emit pass: inverts a conditional branch into a fall-through, drops
-// `INVERTED_Bxx skip ; BRA target ; skip:` pattern when the byte
+// dead conditionals and branches to the next block.  Branch lengths are
-// distance to the target exceeds the +/-128 reach of an 8-bit-PCREL
+// left to the assembler's relaxation.  See W65816BranchCleanup.cpp.
-// branch.  The unconditional BRA is then auto-relaxed to BRL by
+FunctionPass *createW65816BranchCleanup();
-// the assembler when its target is also far.  See W65816BranchExpand.cpp.
-FunctionPass *createW65816BranchExpand();
 
 // Pre-RA pass: when a tied-def Acc16 instruction has a source vreg
 // whose value is also used after the consumer, fast regalloc fails
@@ -235,7 +233,7 @@ void initializeW65816StackSlotCleanupPass(PassRegistry &);
 void initializeW65816I32IncFoldPass(PassRegistry &);
 void initializeW65816SepRepCleanupPass(PassRegistry &);
 void initializeW65816FarPtrStageReusePass(PassRegistry &);
-void initializeW65816BranchExpandPass(PassRegistry &);
+void initializeW65816BranchCleanupPass(PassRegistry &);
 void initializeW65816TiedDefSpillPass(PassRegistry &);
 void initializeW65816ABridgeViaXPass(PassRegistry &);
 void initializeW65816UnLSRPass(PassRegistry &);

src/llvm/lib/Target/W65816/W65816BranchCleanup.cpp

@@ -0,0 +1,154 @@
+//===-- W65816BranchCleanup.cpp - Pre-emit branch cleanup ------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// Tidies the branches block placement leaves at the end of each block:
+//
+//   1.  `Bxx next ; BRA other`, where next is the following block, becomes
+//       `INV_Bxx other` falling through to next (a loop's `beq exit ; bra
+//       loop` becomes `bne loop`: 3 cycles a trip instead of 6).
+//   2.  `Bxx X ; BRA X` loses the conditional: both edges go to X.
+//   3.  A trailing `BRA next` goes: the block falls through.
+//
+// Branch lengths are not decided here.  Every branch leaves the compiler
+// short and W65816AsmBackend relaxes the ones whose final displacement
+// does not fit 8 bits (BRA -> BRL, Bxx -> inverted Bxx over a BRL).  This
+// pass used to lengthen them itself, from byte-size estimates taken
+// before the passes that still move code (stack-slot promotion, far-
+// pointer staging, ...), with a 90-byte safety margin; a quarter of its
+// long branches could have stayed short (0.8% of the corpus's .text).
+//
+//===----------------------------------------------------------------------===//
+
+#include "W65816.h"
+#include "W65816InstrInfo.h"
+#include "W65816Subtarget.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "w65816-branch-cleanup"
+
+namespace {
+
+class W65816BranchCleanup : public MachineFunctionPass {
+public:
+  static char ID;
+  W65816BranchCleanup() : MachineFunctionPass(ID) {}
+  StringRef getPassName() const override {
+    return "W65816 pre-emit branch cleanup";
+  }
+  bool runOnMachineFunction(MachineFunction &MF) override;
+};
+
+} // namespace
+
+char W65816BranchCleanup::ID = 0;
+
+INITIALIZE_PASS(W65816BranchCleanup, DEBUG_TYPE,
+                "W65816 pre-emit branch cleanup", false, false)
+
+FunctionPass *llvm::createW65816BranchCleanup() {
+  return new W65816BranchCleanup();
+}
+
+
+// The MBB a branch's first operand names, or nullptr.
+static MachineBasicBlock *branchTarget(const MachineInstr &MI) {
+  if (MI.getNumOperands() < 1 || !MI.getOperand(0).isMBB())
+    return nullptr;
+  return MI.getOperand(0).getMBB();
+}
+
+
+// Step 3: a block's trailing `BRA next` when next is the following block
+// in layout: block placement sometimes leaves one.  3 bytes, 3 cycles.
+static bool dropBranchToNext(MachineFunction &MF) {
+  bool Changed = false;
+  for (auto MBBIt = MF.begin(); MBBIt != MF.end(); ++MBBIt) {
+    auto NextMBB = std::next(MBBIt);
+    if (NextMBB == MF.end())
+      continue;
+    auto Last = MBBIt->getLastNonDebugInstr();
+    if (Last == MBBIt->end() || Last->getOpcode() != W65816::BRA ||
+        branchTarget(*Last) != &*NextMBB)
+      continue;
+    Last->eraseFromParent();
+    Changed = true;
+  }
+  return Changed;
+}
+
+
+// Step 2: `Bxx X ; BRA X` -- both edges go to X, so the conditional is
+// dead.  The shape survives upstream cleanup when the SELECT_CC inserter
+// or CodeGenPrepare emitted `br i1 %c, label %X, label %X`.
+static bool dropDeadConditionals(MachineFunction &MF) {
+  bool Changed = false;
+  for (MachineBasicBlock &MBB : MF) {
+    auto T = MBB.getFirstTerminator();
+    while (T != MBB.end()) {
+      auto Next = std::next(T);
+      if (Next == MBB.end())
+        break;
+      MachineBasicBlock *CondTarget = branchTarget(*T);
+      if (W65816Helpers::invertCondOpcode(T->getOpcode()) == 0 ||
+          Next->getOpcode() != W65816::BRA || !CondTarget ||
+          CondTarget != branchTarget(*Next)) {
+        ++T;
+        continue;
+      }
+      T = T->eraseFromParent();
+      Changed = true;
+    }
+  }
+  return Changed;
+}
+
+
+// Step 1: `Bxx next ; BRA other`, next the following block, becomes
+// `INV_Bxx other`, falling through to next.  The common case is a tight
+// loop's `beq exit ; bra loop` with the exit placed after the body: the
+// back edge becomes one `bne loop` (3 cycles a trip, not 6).
+static bool invertCondToFallThrough(MachineFunction &MF,
+                                    const TargetInstrInfo *TII) {
+  bool Changed = false;
+  for (auto MBBIt = MF.begin(); MBBIt != MF.end(); ++MBBIt) {
+    auto NextMBB = std::next(MBBIt);
+    if (NextMBB == MF.end())
+      continue;
+    auto T = MBBIt->getFirstTerminator();
+    if (T == MBBIt->end())
+      continue;
+    unsigned InvOpc = W65816Helpers::invertCondOpcode(T->getOpcode());
+    auto N = std::next(T);
+    if (InvOpc == 0 || N == MBBIt->end() || N->getOpcode() != W65816::BRA)
+      continue;
+    MachineBasicBlock *CondTarget = branchTarget(*T);
+    MachineBasicBlock *UncondTarget = branchTarget(*N);
+    if (!UncondTarget || CondTarget != &*NextMBB ||
+        CondTarget == UncondTarget)
+      continue;
+    T->setDesc(TII->get(InvOpc));
+    T->getOperand(0).setMBB(UncondTarget);
+    N->eraseFromParent();
+    Changed = true;
+  }
+  return Changed;
+}
+
+
+bool W65816BranchCleanup::runOnMachineFunction(MachineFunction &MF) {
+  const TargetInstrInfo *TII = MF.getSubtarget<W65816Subtarget>().getInstrInfo();
+  bool Changed = invertCondToFallThrough(MF, TII);
+  Changed |= dropDeadConditionals(MF);
+  Changed |= dropBranchToNext(MF);
+  return Changed;
+}