Bug fix.
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1 changed files with 28 additions and 0 deletions
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@ -431,6 +431,7 @@ struct Imm24Site {
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static std::vector<Imm24Site> gImm24Sites;
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static uint32_t gTextBaseForSites = 0;
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static bool gRecordSites = false;
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static unsigned long gBank0DataSites = 0;
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// --report-self-mod: audit diagnostic. Reports every intra-.text-section
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// IMM16 reference made with a STORE opcode (absolute, DBR-relative) into the
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@ -792,6 +793,32 @@ static void applyTextReloc(std::vector<uint8_t> &buf, uint32_t off,
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// per-seg list for seg 1, since rodata is in seg 1's bank by
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// design).
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if (targetSeg == 0) {
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// BANK-0 DATA/BSS target (inside SEG1's payload) referenced from an overflow segment: the
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// GS/OS Loader honors at most PAGE alignment (it ignores OMF ALIGN=$10000), so seg1 loads
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// at an arbitrary in-bank offset and every baked data operand from another segment misses
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// by that offset (measured live on the RetroNet IIgs client: functions packed into seg1
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// worked, everything else read/wrote unowned memory - MAME memory-tap proven). Emit
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// cINTERSEG records against seg 1 so the Loader writes the true placed address: 3 bytes
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// for IMM24/DATA32, 2 for IMM16 (bank comes from DBR - BANKSIZE=$10000 keeps seg1 within
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// one bank), 2+shift16 for BANK16.
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if (gRecordSites && patchSeg >= 1 && !segments.empty() &&
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(rtype == R_W65816_IMM24 || rtype == R_W65816_DATA32 ||
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rtype == R_W65816_IMM16 || rtype == R_W65816_BANK16) &&
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(target & 0xFF0000u) == 0u && target != 0u) {
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uint8_t cnt = (rtype == R_W65816_IMM24 || rtype == R_W65816_DATA32) ? 3 : 2;
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for (uint8_t i = 0; i < cnt; ++i)
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buf[off + i] = 0;
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InterImm24Site s;
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s.patchSeg = static_cast<uint16_t>(patchSeg);
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s.patchOff = static_cast<uint16_t>(patchAddr - pseg.base);
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s.targetSeg = 1;
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s.targetOff = static_cast<uint16_t>(target);
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s.byteCnt = cnt;
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s.bitShift = (rtype == R_W65816_BANK16) ? 16 : 0;
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gInterImm24Sites.push_back(s);
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gBank0DataSites++;
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return;
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}
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applyReloc(buf, off, patchAddr, target, rtype, symName);
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// Also push into the per-seg list with the same gates as
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// recordCRelocSite (target in same bank as textBase and
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@ -2563,6 +2590,7 @@ int main(int argc, char **argv) {
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linker.writeMultiSegment(outPath, linker.manifestPath, "__start");
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}
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std::fprintf(stderr, "link816: %lu bank0-data cINTERSEG sites\n", gBank0DataSites);
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std::fprintf(stderr,
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"linked: text=[0x%04x+%u] rodata=[0x%04x+%u] bss=[0x%04x+%u] "
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"-> %s (%zu bytes)",
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