# MAME 0.264 patches

install.sh (component `mame`) applies these to the MAME 0.264
release in filename order, then builds one binary with the apple2gs and x68k
drivers. The gates depend on every one of them.

| Patch | What it fixes | Needed by |
|---|---|---|
| 0002-z80scc-rx-fifo | Makes the Z8530 receive FIFO depth selectable at run time (see below). By default it is 512 bytes, so a POLLED receiver (no RX interrupt) survives the emulator's deaf windows; `JOEY_Z80SCC_RX_FIFO=3` restores the real chip's depth. Originally written for RetroNet. | IIgs serial gates (512); `verify-iigs-serial-loss.sh` (3) |
| 0003-x68k-crtc-timing | The X68000 CRTC: the graphic high-speed clear's timing (the main defect), and the text raster copy firing on both hsync edges instead of only the front porch | X68000 gates and timing |
| 0004-x68k-waitstates-rs232-mouse | Three X68000 changes that edit the same files: VRAM wait states (MAME modeled none), the RS-232C port wired to a slot so `-rs232c null_modem` works, and a backport of upstream commit ab6b6fc9e797 (Patrick Mackinlay, "x68k: add serial mouse"), which provides the `:mouse_port:x68k:X/Y/BTN` inputs | `verify-x68000-serial.sh`, `verify-x68000-mouse.sh`, X68000 timing |

There is no 0001 any more. It gave the IIgs SCC a 3.6864 MHz PCLK and no
RTxC clock, to suit a HAL that ran the baud rate generator from PCLK. Stock
MAME already clocks the chip as a IIgs does (PCLK 7.16 MHz from the Mega II,
the 3.6864 MHz crystal on RTxC), and the HAL now runs the generator from
RTxC, as cc65's IIgs driver does, and takes 115200 straight from the crystal.

## Receive FIFO depth (0002)

Real Z8530 silicon holds 3 received bytes (an ESCC, 8), so a real client
needs interrupt-driven receive. Under emulation a polled receiver sees deaf
windows no real machine has, so by default the patched MAME gives every
Z8530 channel (IIgs and X68000 alike) a 512-byte receive FIFO. The
environment variable `JOEY_Z80SCC_RX_FIFO` overrides that for one run:

| `JOEY_Z80SCC_RX_FIFO` | Receive FIFO depth |
|---|---|
| unset or empty | 512 (the default the gates rely on) |
| `3` | the real Z8530 (stock MAME's value); an ESCC keeps its real 8 |
| `N` | N, clamped to 3..512; an ESCC never gets fewer than 8 |

MAME's ring of size N holds N-1 unread bytes, so 3 overruns on the third
unread byte, one byte earlier than silicon (whose 3-byte FIFO fills first):
a slightly stricter test than the real chip. When the variable is set, MAME
prints `<channel tag>: RX FIFO depth N (JOEY_Z80SCC_RX_FIFO)` for each
channel at start-up, so a log shows the depth really was applied.
`scripts/verify-iigs-serial-loss.sh` runs with 3, because a 512-byte FIFO
would hide exactly the receive loss that gate looks for.

## Why the X68000 changes are one patch

They were first kept as three separate patches, but the upstream mouse
backport no longer applied cleanly on top of the other two in any order, and
the sources the working MAME was built from had been fixed up by hand. These
four files were regenerated on 2026-09-27 by diffing that working tree
against the pristine 0.264 release, so they reproduce it exactly (verified:
every file applies with zero fuzz and matches byte for byte).

## Probes

`lua/` holds the MAME Lua probes used while developing the X68000 patches
(boot check, CRTC timing, wait states). Run one with
`mame x68000 -bios ipl10 -autoboot_script lua/<probe>.lua`.

## License

The patches modify MAME and contain its code, so they are under MAME's
license, the GNU GPL v2 or later, not JoeyLib's MIT License. The files 0004
adds from upstream MAME keep their own notices (BSD-3-Clause, Patrick
Mackinlay). The Lua probes in `lua/` are JoeyLib's own (MIT).